1. Field of the Invention
The present invention relates to a signal transfer apparatus, imaging apparatus and radiation image pick-up system using it. More particularly, it is suitable to photoelectric conversion apparatus applicable as image input units of X-ray detectors for medical or non-destructive internal inspection as well as business machines such as copying machines and facsimile machines.
2. Related Background Art
Currently, the mainstream of radiation image pick-up apparatus used for medical diagnosis is a so-called film-based type which involves exposing a human body to radiation, converting the rays that passed through the human body into visible light by means of a phosphor, and exposing a film to it.
However, there is a growing demand for xe2x80x9cdigitization of X-ray image informationxe2x80x9d because of improved diagnostic efficiency achieved by immediacy in acquisition of image information, which is not possible with the conventional film-based type that requires a developing process, as well as because of ease of image transmission necessary for recording, management, and remote medical diagnosis. Recently, X-ray image pickup apparatus have been proposed which employ CCD solid-state image sensing devices or amorphous silicon devices instead of films.
FIG. 29 shows an example of two-dimensional photoelectric conversion apparatus applicable to X-ray image pickup apparatus, described in Japanese Patent Application Laid-Open No. 9-307698.
In FIG. 29, reference numeral 101 denotes a photoelectric conversion circuit unit; 110 denotes a light-receiving area which converts incident light into signal charges; 111 denotes interelectrode capacitance for storing the signal charges resulting from photoelectric conversion carried out by the light-receiving area 110; S1-1 to S3-3 denote photoelectric conversion elements, each comprising a light-receiving area 110 and interelectrode capacitance 111; M1, M2, and M3 denote matrix signal wirings; T1-1 to T3-3 denote switching elements for transferring the signal charges formed by the photoelectric conversion elements S1-1 to S3-3 to the matrix signal wirings M1, M2, and M3; G1, G2, and G3 denote gate drive wirings for driving the switching elements T1-1 to T3-3; and C1, C2, and C3 denote load capacitances of the matrix signal wirings M1, M2, and M3, respectively. Reference numeral 102 denotes a shift register serving as a gate line drive circuit unit for applying drive signals to the gate drive wirings G1, G2, and G3. Reference numeral 107 denotes a bias supply for the photoelectric conversion elements.
Reference numeral 103 denotes a read circuit unit for converting parallel signals transferred from the matrix signal wirings M1 to M3 into series signals and outputting the resulting series signals; SRES1, SRES2, and SRES3 denote reset switches of the load capacitances C1, C2, and C3, respectively; CRES denotes a control signal applied to SRES1, SRES2, and SRES3; A1 to A3 denote buffer amplifiers whose non-inverting input terminals are connected with the matrix signal wirings M1 to M3 and which convert the impedance of output signals received from the matrix signal wirings; Sn1 to Sn3 denote sampling switches for sampling the output signals outputted via the buffer amplifiers A1 to A3; SMPL denotes a voltage pulse applied to the sampling switches Sn1 to Sn3; CL1 to CL3 denote sampling capacitors; B1 to B3 denote buffer amplifiers whose non-inverting input terminals receive sampled output signals and which convert the impedance of the output signals; Sr1 to Sr3 denote read switches for reading the outputs of the buffer amplifiers B1 to B3 in sequence as series signals; 104 denotes a shift register serving as a switch drive circuit unit for reading; and 105 denotes an output buffer amplifier.
Reference numeral 106 denotes an A/D conversion circuit unit for converting analog signals into digital signals.
Incidentally, although a 9-pixel (3xc3x973), two-dimensional photoelectric conversion apparatus is shown in FIG. 29 for the sake of simplicity, actual photoelectric conversion apparatus consist of more pixels depending on their applications.
FIG. 30 is a timing chart illustrating the operation of the photoelectric conversion apparatus shown in FIG. 29.
The signal charges resulting from photoelectric conversion by the photoelectric conversion elements S1-1 to S3-3 are stored in the interelectrode capacitances 111 in the photoelectric conversion elements for a certain period of time. Then, when a first voltage pulse for transfer is applied to the gate drive wiring G1 by the shift register 102 for a time t1, the switching elements T1-1 to T1-3 are turned on and the signal charges stored in the photoelectric conversion elements S1-1 to S1-3 in the first row are transferred, respectively, to the load capacitances C1, C2, and C3 of the matrix signal wirings M1, M2, and M3. The potentials V1, V2, and V3 of the load capacitances C1, C2, and C3 after the signal charges are transferred vary with the amount of signal charge. FIG. 30 shows a case in which the signal charges differ in amount from one another. The operation described so far is referred to as a transfer operation.
The signal charges in the matrix signal wirings M1 to M3 have their impedance converted, respectively, by the buffer amplifiers A1 to A3 in the read circuit unit 103. Then, the sampling switches Sn1 to Sn3 are turned on by the SMPL pulse shown in FIG. 30 for a time t2 and the signal charges are transferred to the sampling capacitors CL1 to CL3. This operation is referred to as a sampling operation.
Next, the read switches Sr1 to Sr3 are turned on in sequence each for a time t3 by read pulses Sp1 to Sp3 from the shift register 104. Consequently, the parallel signal charges transferred to the sampling capacitors CL1 to CL3 have their impedance converted by buffer amplifiers B1 to B3, respectively, are read out as series signals from the final output amplifier 105, and digitized by the A/D conversion circuit unit 106. This operation is referred to as a read operation.
Then, the load capacitances C1 to C3 are reset by the application of the control signal CRES to the reset switches SRES1 to SRES3 for a time t4 to prepare for a read operation of the next row. This operation is referred to as a reset operation.
Similarly, the gate drive wirings G2 and G3 are driven in sequence by the shift register 102 to read out all the pixel data of the photoelectric conversion elements S2-1 to S3-3.
The load capacitances C1 to C3 of the matrix signal wirings M1 to M3 shown in FIG. 29 actually consist of interelectrode capacitances (Cgs) formed at the intersections of gate electrodes of the switching elements T1-1 to T3-3 and electrodes on the signal lines M1 to M3. For example, the load capacitance C1 is given as the sum of the interelectrode capacitances (Cgs) of the three switching elements T1-1, T2-1, and T3-1 connected to the signal line M1. The same applies to the load capacitances C2 and C3. Thus, if the pixel array of the two-dimensional photoelectric conversion circuit unit consists of m rows and n columns, the load capacitance Ci (i=1 to n) of the matrix signal wiring Mi (i=1 to n) is given by the following general formula:
Ci=Cgsxc3x97mxe2x80x83xe2x80x83(1)
The signal charges stored in the interelectrode capacitances 111 in the photoelectric conversion elements are transferred to the load capacitances Ci (i=1 to n) of the matrix signal wirings Mi (i=1 to n) through the transfer operation described above. If the interelectrode capacitance in the photoelectric conversion element is Cs and the signal charge is Qi, the potential Vi of the load capacitance Ci is given by:
Vi=Qi/(Cs+Ci)=Qi/(Cs+mCgs)xe2x80x83xe2x80x83(2)
Since the potential Vs of the interelectrode capacitance Cs before the transfer is
Vs=Qi/Csxe2x80x83xe2x80x83(3)
the signal voltage Vi after the transfer is lower by the load capacitance Ci of the matrix signal wiring. Depending on the size of the photoelectric conversion circuit unit 101, the load capacitance Ci has small impacts if Cgs itself is small in its own way and the pixel array is as small as 3xc3x973 similarly to the example of FIG. 29. However, as the number of pixels increases, the impacts of the load capacitance Ci cannot be ignored. For example, the photoelectric conversion circuit unit of a medical radiation image pick-up apparatus for lungs should be approximately 40 cmxc3x9740 cm. If a pixel pitch of 100 micrometers is used, the number of pixels will be as huge as 16 million (4,000xc3x974,000). Suppose Cs=3 pF and Cgs=0.05 pF, which are values generally used if amorphous silicon TFTs are used for the switching elements described in Japanese Patent Application Laid-Open No. 9-307698, the ratio of the potential Vs to the potential Vi is given by:
Vs:Vi=1/Cs:1/(Cs+4000Cgs)=1:1/68xe2x80x83xe2x80x83(4)
It can be seen that the load capacitance is dominant. In this way, if the potential of signal charges is compressed by a transfer operation, the S/N ratio will be affected adversely in the subsequent read operation.
Specifically, if Vn denotes the voltage noise downstream of the sampling switches Sn1 to Sn3 in the read circuit unit 103 of FIG. 29 (Vn is expressed as the root mean square of the following noises: the thermal noise caused by the switch-on resistance of the sampling switches Sn1 to Sn3 and read switches Sr1 to Sr3, and the noise produced by the buffer amplifiers B1 to B3 and output amplifier 105), then the S/N ratio is given by Vi/Vn. Thus, it can be seen that the S/N ratio is degraded by approximately 36 dB as compared with the case when the signal voltage is not compressed during the transfer operation. Incidentally, in the read circuit unit 103, in addition to Vn described above, there are thermal noise caused by the switch-on resistance of the reset switches SRES1 to SRES3 and noise produced by the buffer amplifiers A1 to A3. However, they are omitted in the above discussion of the S/N ratio because they are equivalent to Vi.
A photoelectric conversion apparatus which can ameliorate the signal-to-noise problem is shown in FIG. 31.
In FIG. 31, reference characters R7 and R8 denote resistor elements, and D1 to D3 denote non-inverting amplifiers whose non-inverting input terminals are connected with the matrix signal wirings M1 to M3 and which amplify the output signals from the matrix signal wirings by an amplification factor G determined by the resistances R7 and R8.
Description of the components denoted by the same reference characters as those described above will be omitted.
FIG. 31 shows an example in which the photoelectric conversion circuit unit 101 consists of 9 pixels (3xc3x973) as is the case with FIG. 29. The difference from the example of FIG. 29 is that the buffer amplifiers A1 to A3 connected to the matrix signal wirings M1 to M3 in the read circuit unit 103 have been replaced by non-inverting amplifiers D1 to D3 having the amplification factor G determined by the resistances R7 and R8.
Regarding S/N ratio again, the signal charges Qi resulting from photoelectric conversion are transferred to the load capacitances C1 to C3 of the matrix signal wirings M1 to M3. The potentials V1 to V3 of the load capacitances C1 to C3 here are given by Equation (2) similarly to the example of FIG. 29. In the example of FIG. 31, the signal voltages V1 to V3 of the load capacitances C1 to C3 connected to the non-inverting input terminals by the non-inverting amplifiers D1 to D3 are multiplied by G before being output. To generalize a two-dimensional photoelectric conversion apparatus with a pixel configuration of m rowsxc3x97n columns, output voltage Vout is given by                                                         Vout              =                              xe2x80x83                            ⁢                                                G                  xc3x97                  Vi                                =                                  G                  xc3x97                                      Qi                    /                                          (                                              Cs                        +                        Ci                                            )                                                                                                                                              =                              xe2x80x83                            ⁢                              G                xc3x97                                  Qi                  /                                      (                                          Cs                      +                      mCgs                                        )                                                  ⁢                                  xe2x80x83                                ⁢                                  (                                      i                    =                    ln                                    )                                                                                        (        5        )            
If the amplification factor G of the non-inverting amplifiers D1 to D3 is set, for example, as follows,
G=1+(R8/R7)=1+(mCgs/Cs)xe2x80x83xe2x80x83(6)
the output voltage Vout is given by Equation (7), which is equivalent to Equation (3).
Vout=Qi/Cs=Vsxe2x80x83xe2x80x83(7)
By comparing Equation (7) with Equation (2), it can be seen that the problem of compressed signal voltage due to the transfer operation has been solved, resulting in improved S/N ratio. As the amplification factor G, the value shown in Equation (6) is used for the simplicity of explanation, but any value can be used as long as it satisfies G greater than 1. Besides, it is evidently advantageous in terms of S/N ratio that the value of G is as large as possible.
However, the example of FIG. 29 above needs improvement in versatility if the read circuit unit is to be used in combination with a two-dimensional photoelectric conversion circuit unit with different pixel arrays. Specifically, if the read circuit unit 103 is used for two photoelectric conversion circuit units having the same photoelectric conversion elements and equal photoelectric conversion efficiency (generating equal signal charges Qi for the same quantity of light), but different pixel arrays, i.e., k rowsxc3x971 columns and m rowsxc3x97n columns, it will produce two different output voltagesxe2x80x94high and lowxe2x80x94as shown below, respectively, according to Equation (5) due to the different load capacitances of the matrix signal wirings:
Vout=Gxc3x97Qi/(Cs+kCgs)xe2x80x83xe2x80x83(8)
Voutxe2x80x2=Gxc3x97Qi/(Cs+mCgs)xe2x80x83xe2x80x83(9)
This means the following: conventional film-based X-ray image pick-up apparatuses, for example, are very versatile, providing a constant dynamic range and S/N ratio if film sensitivity and X-ray dosage are constant even if film size is changed according to the region to be photographed, but it is necessary to provide a dedicated read circuit unit with an appropriate fixed amplification factor G for each of machines with different pixel arrays or provide a circuit for setting an amplification factor G for each machine because the performance of photoelectric conversion apparatus varies with the machine type. Regarding the former approach, it is practically impossible to prepare read circuit units for all machines including those to be commercially introduced in the future. Besides, it is uneconomical. As to the latter approach, it will complicate the circuits, adding to the costs.
Aside from the problem described above, in the case of known operational amplifiers, if integral capacitor is provided between the inverting input terminals and output terminals, it is difficult to provide a sufficiently short reset time for the integral capacitor. Also, further improvement is necessary to increase the operating speed of a signal transfer apparatus.
An object of the present invention is to provide a versatile signal transfer apparatus as well as an imaging apparatus and radiation image pick-up system using it.
Another object of the present invention is to provide a signal transfer apparatus high in S/N ratio and read speed and suitable for photoelectric conversion circuit units with a large pixel count as well as to provide an imaging apparatus and radiation image pick-up system using it.
A signal transfer apparatus of the present invention comprises a plurality of terminals connected to a plurality of signal sources; and a read circuit unit for converting signals received from the above described terminals into series signals and outputting the resulting series signals,
wherein the above described read circuit unit comprises first operational amplifiers connected to the above described terminals, and second operational amplifiers for receiving outputs of the above described first operational amplifiers, each of the above described first operational amplifiers comprising an inverting input terminal connected to each of the above described terminals, an output terminal with an integral capacitor and switch being connected in parallel between it and the inverting input terminal, and a non-inverting input terminal supplied with a reference voltage.
Also, a signal transfer apparatus of the present invention comprises an operational amplifier,
wherein the above described operational amplifier comprises: an inverting input terminal and output terminal with an integral capacitor and reset switch being connected in parallel between them, and a non-inverting input terminal supplied with a reference voltage; and
the above described signal transfer apparatus is provided with a switching circuit for charging and discharging phase compensation capacitor of the above described operational amplifier and a control circuit for controlling the above described switching circuit according to the operation of the above described reset switch.
An imaging apparatus of the present invention comprises a circuit unit which contains conversion elements for converting at least either incident light or rays into electrical signals; a signal transfer circuit unit for transferring signals from the above described circuit unit; first operational amplifiers connected to the above described circuit unit; and second operational amplifiers which receive the output of the first operational amplifier,
wherein an inverting input terminal is connected to the above described circuit unit, an integral capacitor and switch are connected between the inverting input terminal and output terminal of each of the above described first operational amplifiers, and a non-inverting input terminal is connected to a reference voltage source.
Also, an imaging apparatus of the present invention comprises a circuit unit containing conversion elements for converting at least either incident light or rays into electrical signals; and a signal transfer circuit unit for transferring signals from the above described circuit unit,
wherein the above described circuit unit is connected with inverting input terminals of operational amplifiers of the above described signal transfer circuit unit,
an integral capacitor and reset switch are connected in parallel between an output terminal and inverting input terminal of each of the above described operational amplifiers,
a non-inverting input terminal of the operational amplifier is connected with a reference voltage source, and
the above described signal transfer circuit unit is provided with a switching circuit for charging and discharging phase compensation capacitor of the above described operational amplifiers, and a control circuit for controlling the above described switching circuit according to the operation of the above described reset switches.
In the first aspect of the present invention, since the above described signal lines are connected to the inverting input terminals of the above described operational amplifiers, their potential is equal to the voltage of the non-inverting input terminals of the operational amplifiers. Therefore, the signal charges outputted from the above described signal sources are stored in the above described integral capacitor connected between the inverting input terminals and output terminals of the above described operational amplifiers. The output voltage is determined uniquely by the signal charges and the values of the above described integral capacitor. Thus, the output voltage of the above described operational amplifiers does not depend on the load capacitance of the above described signal lines. Consequently, the signal transfer apparatus can be applied versatilely, for example, to photoelectric conversion circuit units with various pixel arrays. Besides, since the signal charges outputted from the first operational amplifiers are input in other operational amplifiers, the signals can be amplified by subjecting the outputted signal charges to impedance conversion as required according to their use or by inputting them into still other operational amplifiers.
On the other hand, a second aspect of the present invention makes it possible to reset the integral capacitor at high speed by controlling the switching circuit for charging and discharging the phase compensation capacitor of the operational amplifiers according to the operation of the reset switches.